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SUM60N04-12LT vishay siliconix new product document number: 71620 s-03830?rev. a, 28-may-01 www.vishay.com 1 temperature sensing mosfet, n-channel 40-v (d-s) temperature-sense diodes for thermal shutdown trenchfet power mosfet 175 c maximum junction temperature esd protected: 2000 v logic-level low on-resistance avalanche rated low gate charge fast turn-on time 5-lead d 2 pak

automotive industrial v (br)dss (v) r ds(on) ( ) i d (a) 0.009 @ v gs = 10 v 60 a 40 0.012 @ v gs = 4.5 v 60 notes a. package limited

the SUM60N04-12LT is a 40-v n-channel, 15-m logic level mosfet in a 5-lead d 2 pak package built on the vishay siliconix proprietary high-cell density trenchfet technology. two anti-parallel electrically isolated poly-silicon diodes are used to sense the temperature changes in the mosfet. the gate of the mosfet is protected from high voltage transients by two back-to-back poly-silicon zener diodes.

d g s n-channel mosfet d 2 pak to-263, 5 leads s gd t 1 t 2 5 1 3 24 t 1 t 2 d 2 d 1
SUM60N04-12LT vishay siliconix new product www.vishay.com 2 document number: 71620 s-03830 ? rev. a, 28-may-01

parameter symbol limit unit drain-source voltage v ds 40 gate-source voltage v gs 20 v v gs clamp current i g 50 ma t c = 25 c 60 a continuous drain current (t j = 175 c) t c = 100 c i d 50 a avalanche current i ar 50 repetitive avalanche energy l = 0.1 mh e ar 125 mj source-to-anode voltage v sa 100 source-to-cathode voltage v sc 100 v t c = 25 c 110 maximum power dissipation a t a = 25 c d p d 3.75 w operating junction and storage temperature range t j , t stg ? 55 to 175 c

parameter symbol limit unit junction-to-ambient d r thja 40 junction-to-case r thjc 1.35 c/w notes: a. package limited. b. duty cycle 1%. c. see soa curve for voltage derating. d. when mounted on 1-inch square pcb fr4.
SUM60N04-12LT vishay siliconix new product document number: 71620 s-03830 ? rev. a, 28-may-01 www.vishay.com 3

parameter symbol test condition min typ max unit static drain-source breakdown voltage v (br)dss v gs = 0 v, i d = 1 ma 40 v gs clamp voltage v gs v ds = 0 v, i g = 20 a 10 20 v gate threshold voltage v gs(th) v ds = v gs , i ds = 1 ma 1 2 gate-body leakage i gss v ds = 0 v, v gs = 5 v 250 na zero gate voltage drain current i dss v ds = 35 v, v gs = 0 v 1 v ds = 35 v, v gs = 0 v, t j = 125 c 50 zero gate voltage drain current i dss v ds = 35 v, v gs = 0 v, t j = 175 c 250 v gs = 10 v, i d = 20 a 0.0075 0.009 v gs = 10 v, i d = 20 a, t j = 125 c 0.0135 drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 20 a, t j = 175 c 0.018 v gs = 4.5 v, i d = 20 a 0.0095 0.012 v fd1 i f = 250 a 675 735 sense diode forward voltage v fd2 i f = 250 a 675 735 mv sense diode forward voltage increase v f from i f = 125 a to i f = 250 a 25 50 forward transconductance a g fs v ds = 15 v, i d = 20 a 35 s dynamic b input capacitance c iss 1920 output capacitance c oss v gs = 0 v, v ds = 25 v, f = 1 mhz 560 pf reverse transfer capacitance c rss 210 total gate charge c q g 51 70 gate-source charge c q gs v ds = 20 v, v gs = 10 v, i d = 25 a 5.5 nc gate-drain charge c q gd ds gs d 12 turn-on delay time c t d(on) 20 40 rise time c t r v dd = 20 v, r l = 0.8 70 120 turn-off delay time c t d(off) v dd = 20 v, r l = 0.8 i d 25 a, v gen = 10 v, r g = 2.5 35 70 ns fall time c t f d gen g 20 40 source-drain diode ratings and characteristics (t c = 25 c) b continuous current i s 60 pulsed current i sm 240 a forward voltage a v sd i f = 60 a, v gs = 0 v 1.4 v reverse recovery time t rr i f = 60 a, di/dt = 100 a/ s 40 60 ns notes: a pulse test; pulse width 300 s, duty cycle 2%. b. guaranteed by design, not subject to production testing. c independent of operating temperature.
SUM60N04-12LT vishay siliconix new product www.vishay.com 4 document number: 71620 s-03830 ? rev. a, 28-may-01

0 500 1000 1500 2000 2500 3000 0 8 16 24 32 40 0 3 6 9 12 15 0 1530456075 0 20 40 60 80 0 20406080100 0.000 0.003 0.006 0.009 0.012 0.015 0.018 0 20 40 60 80 100 120 0 40 80 120 160 200 02468 0 50 100 150 200 250 0246810 output characteristics transfer characteristics capacitance gate charge transconductance on-resistance vs. drain current v ds ? drain-to-source voltage (v) v gs ? gate-to-source voltage (v) ? drain current (a) i d ? gate-to-source voltage (v) q g ? total gate charge (nc) i d ? drain current (a) v ds ? drain-to-source voltage (v) c ? capacitance (pf) v gs i d ? drain current (a) ? transconductance (s) g fs 25 c 125 c 1, 2 v t c = ? 55 c v gs = 20 v i d = 25 a v gs = 10 thru 7 v v gs = 10 v c iss c oss c rss t c = ? 55 c 25 c 125 c 4 v v gs = 4.5 v ? on-resistance ( r ds(on) ) ? drain current (a) i d 3 v 5 v 6 v
SUM60N04-12LT vishay siliconix new product document number: 71620 s-03830 ? rev. a, 28-may-01 www.vishay.com 5

a) f 0.1 0.0 0.4 0.8 1.2 1.6 2.0 ? 50 ? 25 0 25 50 75 100 125 150 175 on-resistance vs. junction t emperature source-drain diode forward voltage t j ? junction temperature ( c) v sd ? source-to-drain voltage (v) ? source current (a) i s 100 10 1 0.3 0.6 0.9 1.4 v gs = 10 v i d = 20 a t j = 25 c t j = 150 c (normalized) ? on-resistance ( r ds(on) ) 0 30 40 50 60 ? 50 ? 25 0 25 50 75 100 125 150 175 drain-source breakdown vs. junction t emperature t j ? junction temperature ( c) avalanche current vs. time t in (sec) 300 10 0.00001 0.001 0.1 1 100 (a) i dav 0.01 i av (a) @ t j = 25 c (v) v (br)dss 1.2 i av (a) @ t j = 150 c 1 i d = 1 ma 0.0 0.2 0.4 0.6 0.8 1.0 ? 50 ? 25 0 25 50 75 100 125 150 175 sense diode forward v oltage vs. t emperature t j ? junction temperature ( c) 0 400 800 1200 1600 2000 0.0 0.2 0.4 0.6 0.8 1.0 sense diode forward voltage v f (v) i f ( a) @ 25 c v f (v) @ i f = 250 a v f (v) @ i f = 125 a v f (v) i( 0.0001
SUM60N04-12LT vishay siliconix new product www.vishay.com 6 document number: 71620 s-03830 ? rev. a, 28-may-01

10 gate-source voltage vs. gate current v gs (v) 0 20 i g (ma) @ 25 c i g (ma) @ 150 c 1 10 ? 1 10 ? 2 10 ? 3 10 ? 4 10 ? 5 10 ? 6 10 ? 7 (ma) i g 4 8 12 16
0 15 30 45 60 75 0 25 50 75 100 125 150 175 safe operating area v ds ? drain-to-source voltage (v) 500 10 0.1 1 10 100 limited by r ds(on) 1 100 t c = 25 c single pulse maximum avalanche and drain current vs. case t emperature t c ? case temperature ( c) ? drain current (a) i d normalized thermal transient impedance, junction-to-case square wave pulse duration (sec) 2 1 0.1 0.01 10 ? 5 10 ? 4 10 ? 3 10 ? 2 10 ? 1 1 normalized effective transient thermal impedance 3 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 ? drain current (a) i d 1 ms 10 ms 100 ms dc 10 s 100 s
SUM60N04-12LT vishay siliconix new product document number: 71620 s-03830 ? rev. a, 28-may-01 www.vishay.com 7

figure 1. ? + c1 560 pf c3 0.1 f r7 10 k 1% r4, 560 k , 1% r6, 560 r5, 18 k gate output signal ic1, lmv321 r2 22 k 1% r1 180 k 1% c2 0.1 f +5 v r3, 18 k power ground signal ground SUM60N04-12LT input the SUM60N04-12LT provides a non-committed diode to allow temperature sensing of the actual mosfet chip. the addition of one simple comparator and a few other components is all that is required to implement a temperature protected mosfet. since it has a very tight tolerance on forward voltage, the forward voltage of the diode can be used to provide to shutdown signal. the diode forward voltage falls to around 0.4 v with a bias current of 250 a when the mosfet chip is close to the maximum permitted temperature value. the external comparator used to detect over temperature can also be used as a driver stage for the mosfet, meaning that the on/off input is logic compatible, and can be driven from a logic gate. a typical circuit is shown in figure 1. here a lmv321 operational amplifier is used to drive the mosfet, and as a comparator to when the maximum junction temperature is reached. the circuit will turn on once more when the chip has cooled to approximately 110 c, and can cycle on and off until the fault is cleared or the power is removed. this circuit has assumed a 5-v rail is available, but the circuit could easily be adapted for a 12-v rail, for example. the lmv321 op amp was selected to give reasonable output current to drive the mosfet at a reasonable price. the sc-70 package means that the protection circuit uses very little board space. however the limited output current means that it can only be used in slow switching applications, where one microsecond switching time and limited dv/dt immunity can be accepted. for pwm and other faster applications, a buffer should be added to drive the mosfet, or the schematic in figure 2 used to give fast switching speed. the reference voltage for the trip point is derived from the 5-v rail, which should have reasonable voltage accuracy and stability ( 0.5 v). a voltage reference could be added if required, but the circuit is only intended to make the mosfet invulnerable to drastic faults that might otherwise cause it to fail, not to give a precise shutdown point. 1% resistors are used to provide a reference voltage of 0.545 v, giving a nominal rising trip point of around 155 c, allowing for the hysteresis drop over r7. a 560-pf capacitor across the inputs of the comparator provides some noise immunity and gives a response time of around a micro second, just faster than the switching speed of the mosfet in this circuit (faster response has diminishing returns as the turn-off time is fixed). this does have a side effect of introducing such a delay at turn-on. if this is an issue (although if this delay is an issue, the switching time should be reviewed also), a separate driver could be added using a comparator for over temperature detection only as shown in figure 2. the diode is then left biased whenever the power is applied to the load and there is no turn-on delay. in a very noisy environment c1 should be increased and additional capacitors may also be required from each input of the comparator to ground and on the logic input.
SUM60N04-12LT vishay siliconix new product www.vishay.com 8 document number: 71620 s-03830 ? rev. a, 28-may-01 the bias current of 250- a nominal is derived from the input signal. in this manner, a simple comparator can be used as a driver for normal on/off operation and a fault detector circuit. the circuit used to provide the input signal must therefore be able to source 0.25 ma with no significant voltage drop. the lmv321 can provide a output current of 60-ma typical, which provides reasonable switching time for non-pwm applications. a 560- resistor is added in series to protect the op amp and to prevent instability, but will result in switching times of several micro seconds. a lower value may be possible depending on layout, but may violate conditions recommended by the op amp manufacturer. hysteresis is added by means of a resistor network around the comparator. approximately 40 c hysteresis is added using the components shown. this hysteresis could be reduced if necessary by increasing the value of r4. another means of implementing hysteresis is to use the output of the comparator to provide some of the bias current for the sensing diode. when the comparator output is low (tripped/off), the bias current is reduced by, say, 150 a, causing the forward voltage to drop by around 50 mv. this concept would also allow a lower sourcing capability in the logic circuit providing the on/off signal and therefore should be used if input current requirements become a problem. with the input high, bias current flows and as long as the forward voltage of the diode is higher than 0.465 v, the comparator output is high and the mosfet is on. if the forward voltage of the diode drops below 0.465 v, the comparator output goes low and the mosfet is turned off. the gate drive voltage can also be used as an output signal (if required) for logic to interpret and to signify that there is a fault. note the cathode of the sensing diode should not be connected directly to the source of the mosfet as the noise introduced by high currents in the source loop could affect operation of the sensing circuit. a separate signal ground should be used and connect to power ground at one point only. a variation on this schematic is shown in figure 2. here a low cost comparator (again in a sot-23 or sc-70) is used to provide a fault output signal only. the diode bias current is taken from the 5 v. in this manner the diode bias is applied at all times, so the noise filtering capacitor, c1 will not introduce a turn-on delay. the fault output signal could be used to enable the gate driver as shown, or fed to larger monitoring circuit to shutdown the mosfet. figure 2. ? + c1 560 pf c3 0.1 f r4, 560 k , 1% ic1, lmv331 r2 22 k 1% r1 180 k 1% c2 0.1 f +5 v r3, 18 k power ground signal ground sub60n04-15lt in enable driver r5 10 k r6 10 k 1%

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